Design and implement an I2C Master Controller capable of communicating with multiple slave devices over a two-wire interface. The project includes start/stop condition generation, address transmission, data transfer, acknowledgment handling, and clock generation. Learners will develop RTL code, perform simulations, and verify protocol compliance. This project provides hands-on experience with one of the most widely used communication protocols in embedded and semiconductor systems.

Develop a digital stopwatch and timer using RTL design techniques. The system should support start, stop, pause, reset, and countdown operations while maintaining accurate timing functionality. Students will implement counters, clock division logic, and display control mechanisms. This project helps learners strengthen their understanding of sequential logic, timing circuits, and real-time digital system design.

Design a bus arbitration unit that manages access requests from multiple devices competing for a shared communication bus. The arbiter will grant access based on predefined priority levels while preventing conflicts and ensuring efficient resource utilization. Learners will implement arbitration logic using RTL coding, perform functional verification, and analyze system performance. This project introduces key concepts used in SoC, processor, and communication system design.